A SystemC based Simulation Platform for Network-on-Chip Architectures

Abstract

As a promising solution for on-chip communication of large systems, the Network-on-Chip paradigm has been studied and developed by many research groups with different approaches. To bring the NoC paradigm into applications, designers have to prove their proposed NoC architectures through hardware description language (HDL) based simulations, or even through silicon test chip. Most of HDL based simulations have been implemented with low level HDLs, usually at register-transfer-level (RTL), requiring a huge ...