Design-for-Test of Asynchronous Networks-on-Chip

Abstract

Abstract—Thanks to many advantages, asynchronous circuits have been used to solve the interconnect problems faced by system-on-chip (SoC) designers. Some asynchronous Networkson-Chip (NoCs) architectures are proposed for the communication within SoCs, but lack methodology and support for manufacturing test to ensure these communication architectures work correctly. In this paper, we present an innovative asynchronous DfT architecture that allows to test the asynchronous communication network architectures, as ...