An efficient hardware architecture for inter-prediction in H. 264/AVC encoders

Abstract

Abstract—In this paper, we propose a design methodology for the inter-prediction in H. 264/AVC codecs by addressing the relationship between its main processes. The target of this methodology is to optimize the design in order to get better performance while keeping a reasonable design cost. An efficient hardware architecture for the inter-prediction in H. 264/AVC codecs is then proposed with three key techniques: a modified full search algorithm with bandwidth efficiency, pipelining technique, and data reuse strategy. With ...